JPL Internship – Flight Software Engineer

Website JPL

Job Description:

You will be part of a high-performing team of hardware, firmware, and research electronic and optical engineers developing and implementing the LRI for NASA. You will be responsible to work with a team testing and demonstrating LRI performance goals. You will also be a key member of the group that develops other laser-based metrology instruments.

Job Responsibilities:

  • Maintain detailed FPGA design documentation
  • Support team with board/assembly/instrument level tests
  • Lead FPGA design reviews
  • Develop FPGA design architectures
  • Verify FPGA design meets requirements
  • Implement FPGA designs for advanced instruments
  • Lead an FPGA team from initial concept through implementation

Job Requirements:

  • 5+ years of experience with FPGA design and verification.
  • Demonstrated ability to work effectively in a team environment.
  • Experience with Xilinx ISE/Vivado, Microsemi Libero SoC, Synplify Pro/Premier, and Mentor Graphics Questa design tools
  • Experience using benchtop power supplies, oscilloscopes, synthesizers, and spectrum analyzers to test FPGA designs
  • Experience developing signal processing algorithms with implementation on FPGA in Verilog, SystemVerilog, and MATLAB Simulink HDL Coder
  • Bachelor’s degree in Electrical Engineering, Computer Engineering or a related discipline with a minimum of 6 years of related work experience; or Master’s degree in a related discipline with a minimum of 4 years of related experience; or PhD degree in related discipline with a minimum of 2 years related experience.
  • Very strong experience designing, implementing, and testing advanced FPGA systems
  • Experience designing with radiation tolerant Xilinx and Microsemi FPGAs
  • Good understanding of communication protocols: SpaceWire, MILSTD-1553, SPI, UART
  • Experience with universal verification methodology, regression testing, hardware in the loop testing, and continuous integration tools like Jenkins
  • Experience with phase-locked-loops and control systems, pseudorandom number codes, modulation, and ranging techniques and related algorithms.

Job Details:

Company: JPL

Vacancy Type: Full Time

Job Location: Pasadena, CA, US

Application Deadline: N/A

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